LBA (Logical Block Addressing) mode
A new HDD accessing method to overcome the 528 Megabyte bottleneck. The number of cylinders, heads & sectors shown in setup may not be the number physically contained in the HDD.
During HDD accessing, the IDE controller will transform the logical address described by sector, head & cylinder into its own physical address inside the HDD.
The maximum HDD size supported by LBA mode is 8.4 Gigabytes which is obtained by the following formula:
no. Cylinder (1024)
x no. Head (255)
x no. Sector (63)
x bytes per sector (512)
8.4 Gigabytes
LARGE mode
Extended HDD access mode supported by Award Software.
Some IDE HDDs contain more than 1024 cylinder without LBA support (in some cases, user do not want LBA). The Award BIOS provides another alternative to support these kinds of LARGE mode:
CYLS. HEAD SECTOR MODE
1120 16 59 NORMAL
560 32 59 LARGE
BIOS tricks DOS (or other OS) that the number of cylinders is less than 1024 by dividing it by 2. At the same time, the number of heads is nultiplied by 2. Reverse transformation process will be made inside INT 12h in order to access the right HDD address the right HDD address!
Maximum HDD size:
no. Cylinder (1024)
x no. Head (32)
x no. Sector (63)
x bytes per sector (512)
1 Gigabytes
NOTE:
To support LBA or LARGE mode of HDDs, there must be some softwares involved. All these softwares are located in the Award HDD Service Routine (1NT 13h). It may be failed to access a HDD with LBA (LARGE) mode selected if you are running under a Operating System which replaces the whole INT 13h.
UNIX operating systems do not support either LBA or LARGE and must set to the Standard mode. UNIX can support drives larger than 528MB.
3-11 SAVE & EXIT SETUP
The "SAVE & EXIT SETUP" option will bring you back to boot up procedure with all the changes you just made which are recorded in the CMOS RAM.
EXIT WITHOUT SAVING
The "EXIT WITHOUT SAVING" option will bring you back to normal boot up procedure without saving any data into CMOS RAM. All of the old data in the CMOS will not be destroyed.
3-13 I/O & MEMORY MAP
MEMORY MAP
| Address Range
| Size
| Description
| | 00000-7FFFF
| 512K
| Conventional memory
| | 80000-9FBFF
| 127K
| Extended Conventional memory
| | 9FC00-9FFFF
| 1K
| Extended BIOS data area if PS/2 mouse is installed
| | A0000-C7FFF
| 160K
| Available for Hi DOS memory
| | C8000-DFFFF
| 96K
| Available for Hi DOS memory and adapter ROMs
| | E0000-EEFFF
| 60K
| Available for UMB
| | EF000-EFFFF
| 4K
| Video service routine for Monochrome & CGA adapter
| | F0000-F7FFF
| 32K
| BIOS CMOS setup utility
| | F8000-FCFFF
| 20K
| BIOS runtime service routine (2)
| | FD000-FDFFF
| 4K
| Plug and Play ESCD data area
| | FE000-FFFFF
| 8K
| BIOS runtime service routine (1)
|
I/O MAP
| 000-01F
| DMA controller (Master)
| | 020-021
| INTERRUPT CONTROLLER (Master)
| | 022-023
| CHIPSET control registers. I/O ports
| | 040-05F
| TIMER control registers
| | 060-06F
| KEYBOARD interface controller (8042)
| | 070-07F
| RTC ports & CMOS I/O ports
| | 080-09F
| DMA register
| | 0A0-0BF
| INTERRUPT controller (Slave)
| | 0C0-0DF
| DMA controller (Slave)
| | 0F0-0FF
| MATH COPROCESSOR
| | 1F0-1F8
| HARD DISK controller
| | 278-27F
| PARALLEL port 2
| | 2B0-2DF
| GRAPHICS adapter controller
| | 2F8-2FF
| SERIAL port 2
| | 360-36F
| NETWORK ports
| | 378-37F
| PARALLEL port 1
| | 3B0-3BF
| MONOCHROME & PARALLEL port adapter
| | 3C0-3CF
| EGA adapter
| | 3D0-CDF
| CGA adapter
| | 3F0-3F7
| FLOPPY DISK controller
| | 3F8-3FF
| SERIAL port-1
|
3-14 TIME & DMA CHANNELS MAP
TIME MAP: TIMER Channel 0 System timer interrupt
TIMER Channel 1 DRAM REFRESH request
TIMER Channel 2 SPEAKER tone generator
DMA CHANNELS: DMA Channel 0 Available
DMA Channel 1 Onboard ECP (Option)
DMA Channel 2 FLOPPY DISK (SMC CHIP)
DMA Channel 3 Onboard ECP (Default)
DMA Channel 4 Cascade for DMA controller 1
DMA Channel 5 Available
DMA Channel 6 Available
DMA Channel 7 Available
INTERRUPT MAP
NMI: Parity check error
IRQ (H/W): 0 System TIMER interrupt from TIMER 0
1 KEYBOARD output buffer full
2 Cascade for IRQ 8-15
3 SERIAL port 2
4 SERIAL port 1
5 PARALLEL port 2
6 FLOPPY DISK (SMC CHIP)
7 PARALLEL port 1
8 RTC clock
9 Available
10 Available
11 Available
12 PS/2 Mouse
13 MATH coprocessor
14 Onboard HARD DISK (IDE1) channel
15 Onboard HARD DISK (IDE2) channel
3-16 RTC & CMOS RAM MAP
RTC & CMOS: 00 Seconds
01 Second alarm
02 Minutes
03 Minutes alarm
04 Hours
05 Hours alarm
06 Day of week
07 Day of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown byte
10 FLOPPY DISK drive type byte
11 Reserve
12 HARD DISK type byte
13 Reserve
14 Equipment type
15 Base memory low byte
16 Base memory high byte
17 Extension memory low byte
18 Extension memory high byte
19-2d
2E-2F
30 Reserved for extension memory low byte
31 Reserved for extension memory high byte
32 DATE CENTURY byte
33 INFORMATION FLAG
34-3F Reserve
40-7F Reserved for CHIPSET SETTING DATA
BIOS REFERENCE-POST CODES
ISA PORT codes are typically output to port address 80h.
| Post
| Name
| Description
| | CO
| Turn Off Chipset Cache
| OEM Specific-Cache controller.
| |
| Processor Test 1
| Processor Status (1 FLAGS) Verification.
Tests the following processor status flags carry, zero, sign, overflow.
The BIOS will set each of these flags, verify the are set, then turn each flag off and verify it is off.
| |
| Processor Test 2
| Read/ Write/ Verify all CPU registers except SS, SP, and BP with data pattern FF and OO.
| |
| Initialize Chips
| Disable NMI, PIE, AIE, UEI, SOWV.
Disable video, parity checking, DMA.
Reset math coprocessor.
Clear all page registers, CMOS shutdown byte.
Initialize timer 0, 1, and 2, including set EISA timer to a known state.
Initialize DMA Controllers 0 and 1.
Initialize interrupt controllers 0 and 1.
Initialize EISA extended registers.
| |
| Test Memory Refresh Toggle
| RAM must be periodically refreshed inorder to keep the memory from decaying.
This function assures that the memory refresh function is working properly.
| |
| Blank video, Initialize keyboard
| Keyboard controller initialization.
| |
| Reserved
|
| |
| Test CMOS Interface and Battery Status
| Verifies CMOS is working correctly, detects bad battery.
| | BE
| Chipset Default
Initialization
| Program chipset registers with power on BIOS defaults.
| | C1
| Memory presence test
| OEM Specific-Test to size on-board memory.
| | C5
| Early Shadow
| OEM Specific-Early Shadow enable for fast boot.
| | C6
| Cache presence test
| External cache size detection.
|
|
| Setup low memory
| Early chip set initialization.
Memory presence test.
OEM chip set routines.
Clear low 64K of memory.
Test first 64K memory.
| |
| Early Cache
Initialization
| Cyrix CPU initialization.
Cache initialization.
| | A
| Setup Interrupt Vector Table
| Initialization first 120 interrupt vectors with SPURIOUS_INT_HDLR and initialize INT 00h-1Fh according to INT_TBL
| | B
| Test CMOS RAM Checksum
| Test CMOS RAM Checksum, if bad, or insert key pressed, load defaults.
| | C
| Initialize keyboard
| Detect type of keyboard controller (optional) Set NUM_LOCK status.
| | D
| Initialize Video Interface
| Detect CPU clock.
Read CMOS location 14h to find out type of video in use.
Detect and Initialize Video Adapter.
| | E
| Test Video Memory
| Test video memory, write sign-on message to screen.
Setup shadow RAM.Enable shadow according to Setup.
| | F
| Test DMA Controller 0
| BIOS checksum test.
Keyboard detect and initialization.
| |
| Test DMA Controller 1
|
| |
| Test DMA Page Registers
| Test DMA Page Registers.
| | 12-13
| Reserved
|
| |
| Test Timer Counter 2
| Test 8254 Timer 0 Counter 2.
| |
| Test 8259-1 Mask Bits
| Verify 8259 Channel 1 masked interrupts by alternately turning off and on the interrupt lines.
| |
| Test 8259-2 Mask Bits
| Verify 8259 Channel 2 masked interrupts by alternately turning off and on the interrupt lines.
|
|
| Test Stuck 8259's
Interrupt Bits
| Turn off interrupts then verify no interrupt mask register is on.
| |
| Test 8259 Interrupt
Functionality
| Force an interrupt and verify the interrupt occurred.
| |
| Test Stuck NMI Bits
(Parity I/O Check)
| Verity NMI can be cleared.
| | 1A
|
| Display CPU clock.
| | 1B-1E
| Reserved
|
| | 1F
| Set EISA Mode
| If EISA non-volatile memory checksum is good, execute EISA initialization. If not, execute ISA tests an clear EISA mode flag.
Test EISA Configuration Memory Integrity (checksum & communication interface).
| |
| Enable Slot 0
| Initialization slot 0 (System Board).
| | 21-2F
| Enable Slot 1-15
| Initialize slot 1 through 15.
| |
| Size Base and Extended
Memory
| Size base memory from 256K to 640K and extended memory above 1MB.
| |
| Test Base and Extended Memory
| Test base memory from 256K to 640K and extended memory above 1MB using various patterns.
NOTE: This will be skipped in EISA mode and can be "skipped" with ESC key in ISA mode.
| |
| Test EISA Extended
Memory
| If EISA Mode flag is set then test EISA memory found in slots initialization.
NOTE: This will be skipped in ISA mode and can be "skipped" with ESC key in EISA mode.
| | 33-3B
| Reserved
|
| | 3C
| Setup Enabled
|
| | 3D
| Initialize & install Mouse
| Detect if mouse is present, initialize mouse, install interrupt vectors.
| | 3E
| Setup Cache Controller
| Initialize cache controller.
| | 3F
| Reserved
|
| | BF
| Chipset Initialization
| Program chipset registers with Setup values
| |
|
| Display virus protest disable or enable.
| |
| Initialize Floppy
Drive & Controller
| Initialize floppy disk drive controller and drives.
| |
| Initialize Hard Drive &
controller
| Initialize hard drive controller and any drives.
|
|
| Detect & Initialize
Serial/Parallel Ports
| Initialize any serial and parallel ports (also game port).
| |
| Reserved
|
| |
| Detect & Initialize
Math Coprocessor
| Initialize math coprocessor.
| |
| Reserved
|
| |
| Reserved
|
| | 48-4D
| Reserved
|
| | 4E
| Manufacturing POST Loop or Display Messages
| Reboot if Manufacturing POST Loop pin is set. Otherwise display any messages (i.e., any non-fatal errors that were detected during POST) and enter Setup.
| | 4F
| Security Check
| Ask password security (optional).
| |
| Write CMOS
| Write all CMOS values back to RAM and clear screen.
| |
| Pre-boot Enable
| Enable parity checker.
Enable NMI, Enable cache before boot.
| |
| Initialize Option ROMs
| Initialize any option ROMs present from
C8OOOh to EFFFFh.
NOTE: When FSCAN option is enabled, will initialize from C8OOOh to F7FFFh.
| |
| Initialize Time Value
| Initialize time value in 40h:BIOS area.
| |
| Setup Virus Protect
| Setup virus protect according to Setup.
| |
| Set Boot Speed
| Set system speed for boot.
| |
| Setup Num Lock
| Setup Num Lock status according to Setup.
| |
| Boot Attempt
| Set low stack.
Boot via INT 19h.
| | B0
| Spurious
| If interrupt occurs in protected mode.
| | B1
| Unclaimed NMI
| If unmasked NMI occurs, display.
Press F1 to disable NMI, F2 reboot.
| | E1-EF
| Setup Pages
| E1-Page 1, E2-Page 2, etc.
| | FF
| Boot
|
|
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